1. Field of the Invention
The present invention relates to a high-voltage generating circuit for generating a high voltage from a power voltage Vcc, and more particularly to a high-voltage generating circuit suitable for use in a semiconductor integrated circuit driven with a low power voltage.
2. Description of the Related Art
A high-voltage generating circuit which generates a high voltage e.g. 25 V from a supplied power voltage Vcc e.g. 5 V is widely utilized in integrated circuits such as semiconductor non-volatile memory devices (EPROMs). In such an EPROM, although read operations are conducted by use of the power voltage Vcc which is usually 5 V, programming operation for writing data into non-volatile memory cells is performed by a high value of program voltage Vpp usually of 25 V. In order to save the number of external terminals, it has been a practice that a power voltage Vcc supplied from a terminal is used for driving the EPROM and for generating the program voltage Vpp by using a built-in high-voltage generator. A conventional high-voltage generating circuit is basically formed by the so-called charge-pump circuit in which drain-source paths of a plurality of insulated gate field effect transistors having gates connected to their respective drains are connected in series between the power voltage terminal and an output terminal of the program voltage Vpp, and a plurality of capacitors are inserted between each interconnection node of the respective adjacent two transistors and one of two clock lines. A first clock signal and a second clock signal of the opposite phase to the first clock signal are applied to the two clock lines. The first and second clock signals are such clock signals having an amplitude (V.phi.) of Vcc. Therefore, the high-voltage V.sub.out generated at the output terminal is represented as: EQU V.sub.out =Vcc+N.multidot.(V.phi.-V.sub.T)
wherein N is a number of the field effect transistors connected in series and V.sub.T is a threshold voltage of the field effect transistors, and V.phi. is a value of the first and second clock signals.
As is apparent from the above equation, the voltage V.sub.out is determined in proportion to the number N. Therefore, if a high voltage of V.sub.out is requested, the numbers of the field effect transistors and the capacitors must be large. Therefore, it is difficult to construct the conventional high-voltage generating circuit by a small number of circuit elements. In other words, efficiency of boosting or increasing a voltage of the conventional high-voltage generating circuit is low.
Moreover, the value of V.phi. is usually same as the power voltage Vcc and if the value of the power voltage Vcc is relatively small and a value of (V.phi.(Vcc)-V.sub.T) is small, it is difficult to obtain a large value of increased voltage V.sub.out, because the factor of (Vcc-V.sub.T) is small. Therefore, boosting efficiency of the circuit is very low. Particularly, if the value of the power voltage Vcc is close to the threshold voltage V.sub.T, such as 1.5 V, the conventional circuit does not boost the voltage any more.